Semidynamics has secured a strategic investment from SK hynix to advance memory-centric AI inference chips and infrastructure.

The collaboration aims to co-optimize Semidynamics' architecture with next-generation memory technologies to tackle memory capacity and data movement bottlenecks in AI workloads.

The partnership will explore co-optimization opportunities and support future tape-outs and rack-level system development, including rack platform buildout.

Headquartered in Barcelona, Semidynamics is building a full-stack AI infrastructure platform—chips, boards, and rack-level systems—for data-center-scale inference.

A 3nm silicon tape-out with TSMC has been completed, marking a milestone toward high-performance AI inference processors and vertically integrated systems.

Semidynamics designs its own memory-centric, open RISC-V architecture centered on the memory wall and employs its Gazzillion memory subsystem to reduce data movement bottlenecks.

The company has secured €45 million in non-dilutive funding from European and Spanish innovation programs to support AI silicon and infrastructure development.

Memor y architecture is central to AI economics, enabling larger models, larger KV-caches, and longer-context inference to lower cost per token.

Industry voices: SK hynix’s Heejin Chung notes the memory-bound nature of AI workloads and the need for architecture-focused solutions, while Semidynamics’ Roger Espasa emphasizes token economics as a memory problem and the company’s strategic direction.